Reorder Buffers

Reorder Buffer is a microarchitectural structure in out-of-order execution processors that temporarily holds instructions in program order to ensure precise exceptions and correct retirement of instruction results.

91

Publications

3K

Citations

229

Authors

78

Institutions

Publications per year

2017–2026

5

Authors

229

  1. DP
    Dmitry Ponomarev

    Binghamton University, United States

    12 publications · 530 citations

    11

    h-index

  2. KG
    Kanad Ghose

    Binghamton University, United States

    11 publications · 436 citations

    10

    h-index

  3. OE
    Oğuz Ergin

    TOBB University of Economics and Technology, Türkiye

    6 publications · 200 citations

    6

    h-index

  4. GK
    Gürhan Küçük

    Binghamton University, United States

    6 publications · 361 citations

    6

    h-index

  5. BJ
    Bruce Jacob

    University of Maryland, College Park, United States

    3 publications · 44 citations

    3

    h-index

1–5 of 229

Venues

  1. IEEE Transactions on Computers

    6 publications · 127 citations

    6

    h-index

  2. ACM SIGARCH Computer Architecture News

    3 publications · 55 citations

    3

    h-index

  3. IEEE Computer Architecture Letters

    3 publications · 66 citations

    3

    h-index

  4. IEEE Journal of Solid-State Circuits

    2 publications · 32 citations

    2

    h-index

  5. IEEE Micro

    2 publications · 31 citations

    2

    h-index

1–5