Concepedia

Register Transfer Level Implementation

Register Transfer Level Implementation is a digital system design methodology that specifies the behavior of synchronous digital circuits in terms of the flow of data between hardware registers and the logical operations performed on that data.

104

Publications

5.2K

Citations

275

Authors

103

Institutions

Publications per year

2017–2026

14

Variants

Rtl Implementation

Parents

Publications

104

The high-level synthesis of digital systems

M.C. McFarland, Alice C. Parker, Raúl Camposano · Proceedings of the IEEE · 1990 · 627 citations

, , +14

Characterizing the effects of transient faults on a high-performance processor pipeline

Nachuan Wang, J. Quek, Todd Rafacz et al. · 2004 · 396 citations

, , +17

SPARK: a high-level synthesis framework for applying parallelizing compiler transformations

Sumit Kumar Gupta, Nikil Dutt, Rajesh K. Gupta et al. · 2003 · 386 citations

, , +17

Tutorial on high-level synthesis

Michael C. McFarland, Alice C. Parker, Raúl Camposano · 1988 · 292 citations

, , +15

A Mechanically Checked Proof of IEEE Compliance of the Floating Point Multiplication, Division and Square Root Algorithms of the AMD-K7<sup>™</sup> Processor

David M. Russinoff · LMS Journal of Computation and Mathematics · 1998 · 170 citations · Full text

, , +15

1–5 of 104

Authors

275

  1. AC
    Alice C. Parker

    University of Southern California, United States

    7 publications · 1.2K citations

    7

    h-index

  2. LH
    L. Hafer

    Carnegie Mellon University, United States

    6 publications · 252 citations

    6

    h-index

  3. MR
    Mario R. Barbacci

    Carnegie Mellon University, United States

    4 publications · 112 citations

    4

    h-index

  4. DP
    Daniel P. Siewiorek

    Carnegie Mellon University, United States

    4 publications · 184 citations

    4

    h-index

  5. HF
    Hideo Fujiwara

    Nara Institute of Science and Technology, Japan

    3 publications · 41 citations

    3

    h-index

1–5 of 275

Institutions

103

  1. Carnegie Mellon University

    Pittsburgh, United States

    11 h-index

    20 publications

    735 citations

  2. University of Southern California

    Los Angeles, United States

    7 h-index

    8 publications

    1.2K citations

  3. ETH Zurich

    Zurich, Switzerland

    4 h-index

    12 publications

    293 citations

  4. Engineering Systems (United States)

    Omaha, United States

    4 h-index

    5 publications

    910 citations

  5. IBM (United States)

    Armonk, United States

    4 h-index

    6 publications

    204 citations

  6. Nara Institute of Science and Technology

    Ikoma, Japan

    4 h-index

    11 publications

    163 citations

  7. University of California, Irvine

    Irvine, United States

    3 h-index

    8 publications

    1.7K citations

  8. Synopsys (United States)

    Mountain View, United States

    3 h-index

    4 publications

    200 citations

1–8 of 103

Venues

  1. 9

    h-index

  2. Design Automation Conference

    Conference · 5 publications · 145 citations

    5

    h-index

  3. 4

    h-index

  4. IEEE Transactions on Industrial Electronics

    2 publications · 47 citations

    2

    h-index

  5. Design, Automation, and Test in Europe

    Conference · 2 publications · 85 citations

    2

    h-index

1–5