Concepedia

Register Transfer Level Debugging

Register Transfer Level Debugging is a formal methodology within hardware debugging that focuses on identifying and resolving functional discrepancies in digital circuits by analyzing and verifying the flow of data between registers and the operations performed on that data during clock cycles.

5

Publications

117

Citations

12

Authors

4

Institutions

Publications per year

2017–2026

0

Variants

Rtl Debugging

Parents

Publications

5

Signal-Tracing Techniques for In-System FPGA Debugging of High-Level Synthesis Circuits

Jeffrey Goeders, Steven J. E. Wilton · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2016 · 46 citations

, , +17

Advanced techniques for RTL debugging

Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen et al. · 2003 · 27 citations

, , +15

MEIC: Re-thinking RTL Debug Automation using LLMs

Ke Xu, Xinwei Fang, Weiwei Shan et al. · 2024 · 25 citations · Full text

, , +13

Automated trace signals selection using the RTL descriptions

Ho Fai Ko, Nicola Nicolici · 2010 · 24 citations

, , +17

A two-state methodology for RTL logic simulation

Lionel C. Bening · 1999 · 10 citations

, , +17

1–5 of 5

Authors

12

  1. LB
    Long Bao Le

    Institut National de la Recherche Scientifique, Canada

    1 publications · 10 citations

    1

    h-index

  2. BT
    Bassam Tabbara

    University of California, Berkeley, United States

    1 publications · 27 citations

    1

    h-index

  3. YH
    Yu-Chin Hsu

    National Tsing Hua University, Taiwan

    1 publications · 27 citations

    1

    h-index

  4. NN
    Nicola Nicolici

    McMaster University, Canada

    1 publications · 24 citations

    1

    h-index

  5. JG
    Jeffrey Goeders

    University of British Columbia, Canada

    1 publications · 46 citations

    1

    h-index

1–5 of 12

Institutions

4

  1. McMaster University

    Hamilton, Canada

    1 h-index

    2 publications

    48 citations

  2. University of Toronto

    Toronto, Canada

    1 h-index

    3 publications

    30 citations

  3. Hewlett-Packard (United States)

    Palo Alto, United States

    1 h-index

    1 publications

    10 citations

  4. University of British Columbia

    Vancouver, Canada

    1 h-index

    2 publications

    92 citations

  5. University of York

    York, United Kingdom

    1 publications

    25 citations

  6. Southeast University

    Nanjing, China

    1 publications

    25 citations

1–6 of 4

Venues

  1. 2

    h-index

1–1