Register Architecture

Register Architecture is a foundational component of an Instruction Set Architecture that defines the organization, number, types, and accessibility of processor registers made available to software, distinguishing it from other architectural elements by directly determining how operands are stored, addressed, and manipulated during instruction execution.

Publications

1.4K

Citations

114

Authors

Institutions

Publications per year

2017–2026

Parents

Fpga ArchitectureInstruction Set Architecture

Publications

The energy complexity of register files

Victor Zyuban, Peter M. Kogge · 1998 · 152 citations · Full text

Engineering, Computer Engineering, Computer Science +14

Virtual machine showdown

Yunhe Shi, Kevin Casey, M. Anton Ertl et al. · ACM Transactions on Architecture and Code Optimization · 2008 · 107 citations · Full text

Computing, Computer Engineering, Computer Science +16

A Unified 4/8/16/32-Point Integer IDCT Architecture for Multiple Video Coding Standards

Sha Shen, Weiwei Shen, Yibo Fan et al. · 2012 · 75 citations

Engineering, Computer Engineering, Computer Science +15

Sliced Message Passing: High Throughput Overlapped Decoding of High-Rate Low-Density Parity-Check Codes

Lingzhi Liu · IEEE Transactions on Circuits and Systems I Regular Papers · 2008 · 70 citations

Computing, Computer Engineering, Computer Science +13

Using register-transfer paths in code generation for heterogeneous memory-register architectures

Guido Araújo, Sharad Malik, Mike Tien-Chien Lee · 1996 · 56 citations

Engineering, Computer Engineering, Computer Science +9

1–5 of 46

Authors

114

NT
Nozomu Togawa
Waseda University, Japan
3 publications · 38 citations
3
h-index
MY
Masao Yanagisawa
Waseda University, Japan
3 publications · 38 citations
3
h-index
VS
Vatsa Santhanam
Hewlett-Packard (United States), United States
2 publications · 55 citations
2
h-index
DO
Daryl Odnert
Hewlett-Packard (United States), United States
2 publications · 55 citations
2
h-index
MA
M. Anton Ertl
TU Wien, Austria
2 publications · 145 citations
2
h-index

1–5 of 114

Institutions

1–8 of 47

Venues

IPSJ Transactions on System and LSI Design Methodology
2 publications · 26 citations
2
h-index
IEEE Transactions on Circuits & Systems II Express Briefs
2 publications · 23 citations
2
h-index
IEEE Spectrum
1 publications · 13 citations
1
h-index
Physical Review Letters
PRL · 1 publications · 47 citations
1
h-index
Marine Policy
1 publications · 53 citations
1
h-index

1–5