Reconfigurable System Verification
Reconfigurable System Verification is a formal process that belongs to the class of system verification methodologies, differing by specifically ensuring the correctness, reliability, and safety of reconfigurable embedded systems through the validation of both static and dynamically reconfigurable hardware and software components.
31
Publications
708
Citations
82
Authors
48
Institutions
Publications per year
2017–2026
5
31
1–5 of 31
82
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48

University of Carthage
Tunis, Tunisia
5 h-index
6 publications
219 citations

Paderborn University
Paderborn, Germany
4 h-index
10 publications
281 citations

Xidian University
Xi'an, China
3 h-index
4 publications
192 citations
Macau University of Science and Technology
Macao, Macao
3 h-index
5 publications
152 citations

National Institute of Applied Science and Technology
Tunis, Tunisia
3 h-index
3 publications
50 citations
University of Michigan
Ann Arbor, United States
2 h-index
3 publications
41 citations

King Saud University
Riyadh, Saudi Arabia
2 h-index
2 publications
88 citations
Siemens (Germany)
Munich, Germany
2 h-index
4 publications
62 citations
1–8 of 48
2 publications · 88 citations
2
h-index
ENTCS · 1 publications · 12 citations
1
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1 publications · 21 citations
1
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JSA · 1 publications · 14 citations
1
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Repository · 1 publications · 13 citations
1
h-index
1–5