Reconfigurable System Verification

Reconfigurable System Verification is a formal process that belongs to the class of system verification methodologies, differing by specifically ensuring the correctness, reliability, and safety of reconfigurable embedded systems through the validation of both static and dynamically reconfigurable hardware and software components.

31

Publications

708

Citations

82

Authors

48

Institutions

Publications per year

2017–2026

5

Authors

82

  1. MK
    Mohamed Khalgui

    University of Carthage, Tunisia

    5 publications · 154 citations

    5

    h-index

  2. ZL
    Zhiwu Li

    Xidian University, China

    4 publications · 139 citations

    4

    h-index

  3. SD
    Stephanie Drzevitzky

    Paderborn University, Germany

    3 publications · 87 citations

    3

    h-index

  4. LK
    Laïd Kahloul

    University of Biskra, Algeria

    3 publications · 50 citations

    3

    h-index

  5. MP
    Marco Platzner

    Paderborn University, Germany

    2 publications · 61 citations

    2

    h-index

1–5 of 82

Venues

  1. 2

    h-index

  2. Electronic Notes in Theoretical Computer Science

    ENTCS · 1 publications · 12 citations

    1

    h-index

  3. 1

    h-index

  4. Journal of Systems Architecture

    JSA · 1 publications · 14 citations

    1

    h-index

  5. Europe PMC (PubMed Central)

    Repository · 1 publications · 13 citations

    1

    h-index

1–5