Pushdown Automata Model Checking

Pushdown Automata Model Checking is a formal verification method that employs a pushdown automaton as a model of computation to algorithmically determine whether a given system specification satisfies desired temporal logic properties, distinguished by its ability to handle infinite-state systems through the manipulation of an unbounded stack.

32

Publications

1.3K

Citations

52

Authors

46

Institutions

Publications per year

2017–2026

1

Authors

52

  1. RM
    Richard Mayr

    University of Edinburgh, United Kingdom

    4 publications · 275 citations

    4

    h-index

  2. JE
    Javier Esparza

    Technical University of Munich, Germany

    4 publications · 274 citations

    4

    h-index

  3. AK
    Antonı́n Kučera

    Masaryk University, Czechia

    4 publications · 275 citations

    4

    h-index

  4. ET
    Etsuji Tomita

    University of Electro-Communications, Japan

    3 publications · 39 citations

    3

    h-index

  5. MH
    Matthew Hague

    University of Oxford, United Kingdom

    2 publications · 51 citations

    2

    h-index

1–5 of 52

Venues

  1. Theoretical Computer Science

    4 publications · 96 citations

    4

    h-index

  2. Journal of Computer and System Sciences

    2 publications · 36 citations

    2

    h-index

  3. Electronic Notes in Theoretical Computer Science

    ENTCS · 2 publications · 159 citations

    2

    h-index

  4. Information and Control

    2 publications · 124 citations

    2

    h-index

  5. Logical Methods in Computer Science

    LMCS · 2 publications · 53 citations

    2

    h-index

1–5