Power-aware Compilation

Power-Aware Compilation is a compiler-level optimization technique that belongs to the class of power-aware design methods, specifically distinguished by its integration of energy consumption models into the code translation and optimization process to minimize the power usage of compiled programs on target hardware architectures.

61

Publications

2.7K

Citations

155

Authors

64

Institutions

Publications per year

2017–2026

11

Authors

155

  1. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    7 publications · 388 citations

    7

    h-index

  2. PM
    Peter Marwedel

    TU Dortmund University, Germany

    5 publications · 616 citations

    5

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  3. NV
    N. Vijaykrishnan

    Pennsylvania State University, United States

    5 publications · 389 citations

    5

    h-index

  4. AS
    Aviral Shrivastava

    Arizona State University, United States

    5 publications · 180 citations

    5

    h-index

  5. SS
    Stefan Steinke

    TU Dortmund University, Germany

    4 publications · 586 citations

    4

    h-index

1–5 of 155

Venues

  1. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 2 publications · 37 citations

    2

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  2. Journal of Systems and Software

    JSS · 2 publications · 49 citations

    2

    h-index

  3. 2

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  4. International Journal of Parallel Programming

    2 publications · 58 citations

    2

    h-index

  5. 1

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1–5