Power Gating Integration
Power Gating Integration is a methodological framework within multi-voltage design that enables the strategic incorporation of power gating mechanisms to manage leakage power by selectively deactivating non-essential circuit blocks through controlled power supply isolation.
13
Publications
367
Citations
81
Authors
16
Institutions
Publications per year
2017–2026
1
Parents
13
90nm low leakage SoC design techniques for wireless applications
Philippe Royannez, H. Mair, Franck Dahan et al. · 2005 · 100 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 0.6V 205MHz 19.5ns tRC 16Mb embedded DRAM
K. Hardee, F. Jones, D. Butler et al. · 2004 · 32 citations
Engineering, Computer Engineering, Electrical Engineering +17
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Illinois Institute of Technology
Chicago, United States
2 h-index
6 publications
72 citations
Politecnico di Torino
Turin, Italy
2 h-index
6 publications
143 citations
Texas Instruments (United States)
Dallas, United States
2 h-index
17 publications
1.5K citations
LG (South Korea)
Seoul, South Korea
1 h-index
2 publications
40 citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
1 h-index
3 publications
72 citations
Sony Computer Science Laboratories
Tokyo, Japan
1 h-index
2 publications
64 citations

Universiti Teknologi MARA
Shah Alam, Malaysia
1 h-index
4 publications
72 citations
Massachusetts Institute of Technology
Cambridge, United States
1 h-index
3 publications
63 citations
1–8 of 16
1 publications · 61 citations
1
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1 publications · 12 citations
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Repository · 1 publications · 13 citations
1
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1 publications · 21 citations
1
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1 publications · 24 citations
1
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