Placement-driven Architecture

Placement-Driven Architecture is a FPGA architecture design approach that belongs to the class of hardware optimization methodologies, distinguished by its integration of placement constraints and feedback directly into the architectural definition to jointly optimize logic block organization and routing resources for improved placement predictability and performance.

Publications

234

Citations

Authors

Institutions

Publications per year

2017–2026

Parents

Fpga Architecture

Publications

Architecture and Synthesis for On-Chip Multicycle Communication

Yushun Fan, Gao Han, Xin Yang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2004 · 80 citations

Engineering, Computer Engineering, Computer Science +17

Multiple Dice Working as One: CAD Flows and Routing Architectures for Silicon Interposer FPGAs

Ehsan Nasiri, Javeed Shaikh, André Hahn Pereira et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2015 · 36 citations

Engineering, Computer Engineering, Computer Science +17

Place-and-route impact on the security of DPL designs in FPGAs

Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage et al. · 2008 · 27 citations

Engineering, Computer Engineering, Computer Science +16

Power-dissipation driven FPGA place and route under timing constraints

Kaushik Roy · IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 1999 · 21 citations

Engineering, Computer Engineering, Electrical Engineering +17

Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs

Pruek Vanna-Iampikul, Chengjia Shao, Yi‐Chen Lu et al. · 2021 · 21 citations

Engineering, Computer Engineering, Design +16

1–5 of 9

Authors

KR
Kaushik Roy
Purdue University West Lafayette, United States
1 publications · 21 citations
1
h-index
SK
Sung Kyu Lim
Georgia Institute of Technology, United States
1 publications · 21 citations
1
h-index
PH
Philippe Hoogvorst
Télécom Paris, France
1 publications · 27 citations
1
h-index
JM
Jennifer M. Schopf
Argonne National Laboratory, United States
1 publications · 11 citations
1
h-index
VV
Vinh-Nga Vong
Télécom Paris, France
1 publications · 27 citations
1
h-index

1–5 of 52

Institutions

1–8 of 18

Venues

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
1 publications · 36 citations
1
h-index
IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications
1 publications · 21 citations
1
h-index
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
1 publications · 80 citations
1
h-index
Journal of Physics Conference Series
1 publications · 11 citations
1
h-index

1–4