Pipeline Verification
Pipeline Verification is a formal method for validating the correctness and consistency of computational stages and data flow in a pipeline parallelism system, distinguishing it from general verification techniques through its focus on inter-stage dependencies, synchronization, and stage-wise output integrity within the pipeline execution model.
35
Publications
1.3K
Citations
70
Authors
33
Institutions
Publications per year
2017–2026
4
Parents
35
Techniques for verifying superscalar microprocessors
Jerry R. Burch · 1996 · 107 citations · Full text
Daniel Kroening, Wolfgang J. Paul · 2001 · 46 citations
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University of California, Irvine
Irvine, United States
6 h-index
18 publications
339 citations
Georgia Institute of Technology
Atlanta, United States
5 h-index
9 publications
178 citations
Institute of Systems, Information Technologies and Nanotechnologies
Fukuoka, Japan
3 h-index
3 publications
64 citations
University of California, Los Angeles
Los Angeles, United States
2 h-index
9 publications
555 citations
Princeton University
Princeton, United States
2 h-index
3 publications
517 citations

Lawrence Berkeley National Laboratory
Berkeley, United States
2 h-index
2 publications
119 citations
Cadence Design Systems (United States)
San Jose, United States
2 h-index
2 publications
119 citations
Stanford University
Stanford, United States
2 h-index
4 publications
106 citations
1–8 of 33
Conference · 1 publications · 12 citations
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1 publications · 10 citations
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TECS · 1 publications · 30 citations
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1 publications · 26 citations
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1 publications · 379 citations
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