Pipeline Flushes

Pipeline Flushes is a control mechanism in pipeline parallelism that invalidates and discards in-flight data instances from the pipeline stages to ensure correct execution following changes in model structure, input distribution, or runtime conditions.

16

Publications

1.3K

Citations

62

Authors

25

Institutions

Publications per year

2017–2026

5

Authors

62

  1. KL
    Konrad Lai

    Intel (United States), United States

    2 publications · 41 citations

    2

    h-index

  2. AF
    Ayose Falcón

    Universitat Politècnica de Catalunya, Spain

    2 publications · 41 citations

    2

    h-index

  3. OM
    Onur Mutlu

    Carnegie Mellon University, United States

    2 publications · 108 citations

    2

    h-index

  4. JS
    Jared Stark

    Intel (United States), United States

    2 publications · 41 citations

    2

    h-index

  5. AP
    Arthur Pérais

    Institut de Recherche en Informatique et Systèmes Aléatoires, France

    2 publications · 27 citations

    2

    h-index

1–5 of 62

Venues

  1. Software Practice and Experience

    1 publications · 18 citations

    1

    h-index

  2. 1

    h-index

  3. IEEE Micro

    1 publications · 19 citations

    1

    h-index

  4. IEEE Transactions on Computers

    1 publications · 10 citations

    1

    h-index

  5. ACM Transactions on Architecture and Code Optimization

    TACO · 1 publications · 72 citations

    1

    h-index

1–5