Physical Attack Resistance

Physical Attack Resistance is a security property of embedded systems that enables them to withstand unauthorized access, manipulation, or extraction of sensitive information through direct physical interaction with the hardware, distinguished from other security properties by its focus on adversarial actions involving physical proximity or tampering with the device’s physical substrate.

67

Publications

5.6K

Citations

221

Authors

85

Institutions

Publications per year

2017–2026

34

Variants

Hardware Tamper Resistance

Authors

221

  1. SD
    Srinivas Devadas

    Massachusetts Institute of Technology, United States

    3 publications · 382 citations

    3

    h-index

  2. KE
    Kevin Eykholt

    University of Michigan, United States

    2 publications · 2.6K citations

    2

    h-index

  3. SP
    Stuart P. Taylor

    Kent State University, United States

    2 publications · 48 citations

    2

    h-index

  4. AR
    Amir Rahmati

    University of Michigan, United States

    2 publications · 2.6K citations

    2

    h-index

  5. IE
    Ivan Evtimov

    University of Washington, United States

    2 publications · 2.6K citations

    2

    h-index

1–5 of 221

Venues

  1. Journal of Interpersonal Violence

    3 publications · 244 citations

    3

    h-index

  2. IEEE Access

    2 publications · 58 citations

    2

    h-index

  3. Journal of Applied Social Psychology

    2 publications · 54 citations

    2

    h-index

  4. Computers & Security

    2 publications · 67 citations

    2

    h-index

  5. 2

    h-index

1–5