Phase-locked Loop Integration
Phase-Locked Loop Integration is a methodological framework within analog integrated circuit design that enables the monolithic incorporation of phase-locked loop functionality by cohesively combining voltage-controlled oscillators, phase detectors, and loop filters into a single semiconductor substrate to ensure precise frequency synthesis and synchronization in mixed-signal systems.
19
Publications
459
Citations
72
Authors
29
Institutions
Publications per year
2017–2026
1
Variants
Pll Integration
Parents
19
High multiplication factor capacitor multiplier for an on-chip PLL loop filter
Jaehyouk Choi, J. Park, W. Kim et al. · Electronics Letters · 2009 · 38 citations
Tristan Dubois, Jean‐Jacques Laurin, Jérémy Raoult et al. · IEEE Transactions on Electromagnetic Compatibility · 2013 · 35 citations
1–5 of 19
72
3
h-index
2
h-index
2
h-index
2
h-index
1
h-index
1–5 of 72
29
University of California, Santa Barbara
Santa Barbara, United States
3 h-index
11 publications
163 citations
NXP (Netherlands)
Eindhoven, The Netherlands
2 h-index
4 publications
82 citations
University of Massachusetts Dartmouth
North Dartmouth, United States
2 h-index
6 publications
108 citations

Drexel University
Philadelphia, United States
2 h-index
2 publications
36 citations

Centre National de la Recherche Scientifique
Paris, France
1 h-index
3 publications
105 citations

Université de Montpellier
Montpellier, France
1 h-index
2 publications
70 citations
Technion – Israel Institute of Technology
Haifa, Israel
1 h-index
1 publications
11 citations
Institut d'Électronique et des Systèmes
Montpellier, France
1 h-index
2 publications
70 citations
1–8 of 29
2 publications · 39 citations
2
h-index
2 publications · 71 citations
2
h-index
2 publications · 42 citations
2
h-index
2 publications · 78 citations
2
h-index
2 publications · 48 citations
2
h-index
1–5