Concepedia

Parallel Thread Scheduling

Parallel Thread Scheduling is a GPU execution model mechanism that organizes and manages concurrent thread execution by assigning groups of threads to processing units in a way that maximizes resource utilization and minimizes idle cycles through fine-grained context switching.

26

Publications

1.2K

Citations

92

Authors

42

Institutions

Publications per year

2017–2026

9

Parents

Publications

26

Improving GPU performance via large warps and two-level warp scheduling

Veynu Narasiman, Michael Shebanow, Chang Joo Lee et al. · 2011 · 419 citations

, , +16

Enterprise

Hang Liu, H. Howie Huang · 2015 · 161 citations · Full text

, , +17

A case for core-assisted bottleneck acceleration in GPUs

Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog et al. · 2015 · 100 citations

, , +17

Multi-thread parallel algorithm for reconstructing 3D large-scale porous structures

Yang Ju, Yao‐Hui Huang, Jiangtao Zheng et al. · Computers & Geosciences · 2017 · 62 citations

, , +14

Scheduling Page Table Walks for Irregular GPU Applications

Seunghee Shin, Guilherme Cox, Mark Oskin et al. · 2018 · 59 citations

, , +17

1–5 of 26

Authors

92

  1. OM
    Onur Mutlu

    Carnegie Mellon University, United States

    4 publications · 556 citations

    4

    h-index

  2. AJ
    Adwait Jog

    William & Mary, United States

    2 publications · 113 citations

    2

    h-index

  3. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    2 publications · 113 citations

    2

    h-index

  4. RA
    Rachata Ausavarungnirun

    Carnegie Mellon University, United States

    2 publications · 113 citations

    2

    h-index

  5. TC
    Todd C. Mowry

    Carnegie Mellon University, United States

    2 publications · 113 citations

    2

    h-index

1–5 of 92

Institutions

42

  1. Carnegie Mellon University

    Pittsburgh, United States

    4 h-index

    17 publications

    1.2K citations

  2. Purdue University West Lafayette

    West Lafayette, United States

    2 h-index

    8 publications

    180 citations

  3. Seattle University

    Seattle, United States

    2 h-index

    2 publications

    45 citations

  4. Pennsylvania State University

    State College, United States

    2 h-index

    6 publications

    339 citations

  5. Microsoft (United States)

    Redmond, United States

    2 h-index

    2 publications

    45 citations

  6. University of Southern California

    Los Angeles, United States

    1 h-index

    1 publications

    37 citations

  7. Nvidia (United Kingdom)

    Reading, United Kingdom

    1 h-index

    1 publications

    419 citations

  8. University of Illinois Urbana-Champaign

    Urbana, United States

    1 h-index

    2 publications

    26 citations

1–8 of 42

Venues

  1. Theory of Computing Systems

    1 publications · 25 citations

    1

    h-index

  2. Computers & Geosciences

    CAGEO · 1 publications · 62 citations

    1

    h-index

  3. IEEE Transactions on Power Systems

    1 publications · 12 citations

    1

    h-index

  4. arXiv (Cornell University)

    Repository · 1 publications · 11 citations

    1

    h-index

  5. Performance Evaluation

    1 publications · 15 citations

    1

    h-index

1–5