Parallel Speedup Analysis

Parallel Speedup Analysis is a formal metric in multiprocessor systems that quantifies the performance improvement of a parallelized computation relative to its sequential execution, normalized by the number of processing elements employed.

768

Publications

46K

Citations

2K

Authors

611

Institutions

Publications per year

2017–2026

82

Authors

2K

  1. XS
    Xian‐He Sun

    Illinois Institute of Technology, United States

    6 publications · 281 citations

    6

    h-index

  2. XL
    Xiangru Lian

    University of Rochester, United States

    5 publications · 565 citations

    5

    h-index

  3. DE
    Didier El Baz

    Laboratoire d'Analyse et d'Architecture des Systèmes, France

    4 publications · 98 citations

    4

    h-index

  4. DM
    Dean M. Tullsen

    University of California San Diego, United States

    4 publications · 350 citations

    4

    h-index

  5. CE
    Charles E. Leiserson

    Massachusetts Institute of Technology, United States

    4 publications · 506 citations

    4

    h-index

1–5 of 2K

Venues

  1. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 26 publications · 876 citations

    18

    h-index

  2. arXiv (Cornell University)

    Repository · 21 publications · 1.3K citations

    17

    h-index

  3. IEEE Transactions on Computers

    18 publications · 1.2K citations

    15

    h-index

  4. Journal of Computational Chemistry

    14 publications · 517 citations

    12

    h-index

  5. SIAM Journal on Scientific Computing

    11 publications · 442 citations

    11

    h-index

1–5