Parallel Computing Interconnects

Parallel Computing Interconnects is a hardware and topology-level architecture that enables high-bandwidth, low-latency communication among processing nodes in parallel computing systems by systematically interconnecting switches and links to support scalable and efficient data exchange.

386

Publications

20.7K

Citations

1.2K

Authors

302

Institutions

Publications per year

2017–2026

23

Authors

1.2K

  1. DK
    Dhabaleswar K. Panda

    The Ohio State University, United States

    18 publications · 623 citations

    15

    h-index

  2. MJ
    Matthew J. Koop

    The Ohio State University, United States

    7 publications · 214 citations

    7

    h-index

  3. SS
    Sayantan Sur

    The Ohio State University, United States

    6 publications · 181 citations

    6

    h-index

  4. HJ
    Howard Jay Siegel

    Colorado State University, United States

    6 publications · 255 citations

    6

    h-index

  5. LV
    Laxmikant V. Kalé

    University of Illinois Urbana-Champaign, United States

    5 publications · 157 citations

    5

    h-index

1–5 of 1.2K

Venues

  1. IEEE Transactions on Computers

    16 publications · 2K citations

    15

    h-index

  2. ACM SIGARCH Computer Architecture News

    11 publications · 830 citations

    11

    h-index

  3. Computer

    10 publications · 1.6K citations

    10

    h-index

  4. IEEE Micro

    9 publications · 469 citations

    9

    h-index

  5. Journal of Parallel and Distributed Computing

    7 publications · 187 citations

    7

    h-index

1–5