Concepedia

Optimal Instruction Scheduling

Optimal Instruction Scheduling is an instruction scheduling technique that belongs to the class of compiler optimization methods and specifically denotes the arrangement of machine instructions in a program sequence that achieves the theoretically minimal execution time under given architectural constraints.

61

Publications

2.1K

Citations

120

Authors

63

Institutions

Publications per year

2017–2026

5

Parents

Publications

61

Fast implementation of DGEMM on Fermi GPU

Guangming Tan, Linchuan Li, Sean Triechle et al. · 2011 · 111 citations

, , +17

Optimal instruction scheduling using integer programming

Kent Wilken, Jack Liu, Mark Heffernan · 2000 · 110 citations · Full text

, , +17

Constructive methods for scheduling uniform loop nests

Alain Darte, Yves Robert · IEEE Transactions on Parallel and Distributed Systems · 1994 · 107 citations

, , +14

Register allocation with instruction scheduling

Shlomit S. Pinter · 1993 · 95 citations

, , +17

Register allocation with instruction scheduling: a new approach.

Shlomit S. Pinter · Journal of programming languages · 1996 · 80 citations

, , +15

1–5 of 61

Authors

120

  1. AE
    Alexandre E. Eichenberger

    IBM Research - Thomas J. Watson Research Center, United States

    4 publications · 178 citations

    4

    h-index

  2. AB
    Andrzej Bednarski

    Linköping University, Sweden

    4 publications · 90 citations

    4

    h-index

  3. ES
    Edward S. Davidson

    University of Michigan, United States

    4 publications · 178 citations

    4

    h-index

  4. SW
    Sebastian Winkel

    Saarland University, Germany

    4 publications · 114 citations

    4

    h-index

  5. GS
    Ghassan Shobaki

    California State University, Sacramento, United States

    4 publications · 74 citations

    4

    h-index

1–5 of 120

Institutions

63

  1. Linköping University

    Linköping, Sweden

    4 h-index

    5 publications

    92 citations

  2. University of Michigan

    Ann Arbor, United States

    4 h-index

    8 publications

    356 citations

  3. IBM (United States)

    Armonk, United States

    4 h-index

    4 publications

    129 citations

  4. University of California, Davis

    Davis, United States

    3 h-index

    8 publications

    447 citations

  5. University of Waterloo

    Waterloo, Canada

    3 h-index

    8 publications

    174 citations

  6. Intel (United States)

    Santa Clara, United States

    2 h-index

    2 publications

    78 citations

  7. University of Electro-Communications

    Tokyo, Japan

    2 h-index

    4 publications

    68 citations

  8. Massachusetts Institute of Technology

    Cambridge, United States

    2 h-index

    4 publications

    252 citations

1–8 of 63

Venues

  1. ACM SIGPLAN Notices

    5 publications · 112 citations

    5

    h-index

  2. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 3 publications · 168 citations

    3

    h-index

  3. IEEE Transactions on Computers

    2 publications · 85 citations

    2

    h-index

  4. ACM Transactions on Architecture and Code Optimization

    TACO · 2 publications · 38 citations

    2

    h-index

  5. KTH Publication Database DiVA (KTH Royal Institute of Technology)

    Repository · 2 publications · 52 citations

    2

    h-index

1–5