Obfuscated Sequential Logic

Obfuscated Sequential Logic is a hardware security technique that belongs to the class of logic obfuscation methods, specifically characterized by the intentional modification of sequential circuit elements to conceal their functionality and delay unauthorized reverse engineering or intellectual property theft.

13

Publications

562

Citations

27

Authors

10

Institutions

Publications per year

2017–2026

10

Authors

27

  1. SB
    Swarup Bhunia

    Case Western Reserve University, United States

    3 publications · 240 citations

    3

    h-index

  2. RS
    Rajat Subhra Chakraborty

    Indian Institute of Technology Kharagpur, India

    3 publications · 230 citations

    3

    h-index

  3. RK
    Rajit Karmakar

    Indian Institute of Technology Kharagpur, India

    2 publications · 87 citations

    3

    h-index

  4. SC
    Santanu Chattopadhyay

    Indian Institute of Technology Kharagpur, India

    1 publications · 22 citations

    2

    h-index

  5. BS
    Bicky Shakya

    University of Florida, United States

    1 publications · 23 citations

    1

    h-index

1–5 of 27

Venues

  1. 2

    h-index

  2. IEEE Transactions on Emerging Topics in Computing

    ITETBT · 1 publications · 22 citations

    1

    h-index

  3. IEEE Design and Test

    1 publications · 23 citations

    1

    h-index

  4. arXiv (Cornell University)

    Repository · 1 publications · 65 citations

    1

    h-index

  5. 1

    h-index

1–5