Memory Protection Hardware Support

Memory Protection Hardware Support is a hardware-based mechanism that enforces access control to memory regions by providing privileged architectural features—such as boundary registers, page tables, and protection keys—to prevent unauthorized or unintended access by processes or threads, thereby ensuring system integrity and isolation.

18

Publications

620

Citations

34

Authors

17

Institutions

Publications per year

2017–2026

5

Authors

34

  1. RM
    Roger M. Needham

    University of Cambridge, United Kingdom

    4 publications · 79 citations

    4

    h-index

  2. SW
    Stephen W. Keckler

    The University of Texas at Austin, United States

    3 publications · 134 citations

    3

    h-index

  3. NP
    Nicholas P. Carter

    Massachusetts Institute of Technology, United States

    3 publications · 134 citations

    3

    h-index

  4. WJ
    William J. Dally

    Stanford University, United States

    3 publications · 134 citations

    3

    h-index

  5. YS
    Yan Solihin

    North Carolina State University, United States

    2 publications · 97 citations

    2

    h-index

1–5 of 34

Venues

  1. ACM SIGOPS Operating Systems Review

    2 publications · 28 citations

    2

    h-index

  2. The Computer Journal

    1 publications · 11 citations

    1

    h-index

  3. ACM SIGPLAN Notices

    1 publications · 19 citations

    1

    h-index

  4. ACM SIGARCH Computer Architecture News

    1 publications · 10 citations

    1

    h-index

  5. Proceedings of the IEEE

    1 publications · 13 citations

    1

    h-index

1–5