Memory Hierarchy Integration
Memory Hierarchy Integration is a framework in computer architecture that orchestrates the coherent and efficient interaction between processing accelerators and multiple levels of memory subsystems to optimize data locality, bandwidth utilization, and energy efficiency within heterogeneous computing environments.
91
Publications
6.4K
Citations
396
Authors
111
Institutions
Publications per year
2017–2026
21
Parents
91
In-Memory Computing: Advances and Prospects
Naveen Verma, Hongyang Jia, Hossein Valavi et al. · IEEE Solid-State Circuits Magazine · 2019 · 430 citations
An Integrated Theory of List Memory
John R. Anderson, Dan Bothell, Christian Lebière et al. · Journal of Memory and Language · 1998 · 409 citations
Duck-Hwan Kim, Jaeha Kung, Sek Chai et al. · ACM SIGARCH Computer Architecture News · 2016 · 355 citations
Memory scaling: A systems architecture perspective
Onur Mutlu · 2013 · 254 citations · Full text
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111
University of Michigan
Ann Arbor, United States
6 h-index
10 publications
663 citations
Georgia Institute of Technology
Atlanta, United States
5 h-index
16 publications
2.3K citations
Carnegie Mellon University
Pittsburgh, United States
5 h-index
15 publications
3K citations
Intel (United States)
Santa Clara, United States
4 h-index
11 publications
976 citations
University of California, Berkeley
Berkeley, United States
4 h-index
5 publications
593 citations
The University of Texas at Austin
Austin, United States
3 h-index
7 publications
1.9K citations
University of Illinois Urbana-Champaign
Urbana, United States
3 h-index
3 publications
65 citations
Advanced Micro Devices (Canada)
Markham, Canada
3 h-index
5 publications
713 citations
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6 publications · 312 citations
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3 publications · 412 citations
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TOMS · 2 publications · 907 citations
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2 publications · 154 citations
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1 publications · 31 citations
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