Concepedia

Memory Barriers

Memory Barriers is a synchronization mechanism in computer architecture that enforces a strict ordering constraint on memory operations relative to one another, thereby preventing speculative execution and reordering optimizations that would violate the guarantees of a given memory consistency model.

43

Publications

2.6K

Citations

131

Authors

55

Institutions

Publications per year

2017–2026

4

Parents

Publications

43

Software transactional memory for dynamic-sized data structures

Maurice Herlihy, Victor Luchangco, Mark Moir et al. · 2003 · 999 citations

, , +14

Enforcing isolation and ordering in STM

Tatiana Shpeisman, Vijay Menon, Ali-Reza Adl-Tabatabai et al. · 2007 · 205 citations

, , +16

Earlybird: Real-Time Search at Twitter

Michael Busch, Krishna Gade, Brian Larson et al. · 2012 · 163 citations

, , +17

Efficient persist barriers for multicores

Arpit Joshi, Vijay Nagarajan, Marcelo Cintra et al. · 2015 · 93 citations

, , +15

Hiding relaxed memory consistency with a compiler

Jinseok Lee, David Padua · IEEE Transactions on Computers · 2001 · 78 citations

, , +17

1–5 of 43

Authors

131

  1. PE
    Paul E. McKenney

    Portland State University, United States

    3 publications · 133 citations

    3

    h-index

  2. AP
    Antoniu Pop

    Institut national de recherche en sciences et technologies du numérique, France

    3 publications · 89 citations

    3

    h-index

  3. FZ
    Francesco Zappa Nardelli

    Institut national de recherche en sciences et technologies du numérique, France

    3 publications · 87 citations

    3

    h-index

  4. AC
    Albert Cohen

    Institut national de recherche en sciences et technologies du numérique, France

    3 publications · 89 citations

    3

    h-index

  5. NM
    Nhat Minh Lê

    École Normale Supérieure - PSL, France

    3 publications · 89 citations

    3

    h-index

1–5 of 131

Institutions

55

  1. Institut national de recherche en sciences et technologies du numérique

    Le Chesnay-Rocquencourt, France

    5 h-index

    16 publications

    470 citations

  2. Max Planck Institute for Software Systems

    Saarbrücken, Germany

    3 h-index

    5 publications

    142 citations

  3. University of Washington

    Seattle, United States

    3 h-index

    7 publications

    710 citations

  4. École Normale Supérieure - PSL

    Paris, France

    3 h-index

    12 publications

    356 citations

  5. Intel (United States)

    Santa Clara, United States

    3 h-index

    12 publications

    1.2K citations

  6. Shanghai Jiao Tong University

    Shanghai, China

    3 h-index

    7 publications

    169 citations

  7. Brown University

    Providence, United States

    2 h-index

    2 publications

    1K citations

  8. University of Illinois Urbana-Champaign

    Urbana, United States

    2 h-index

    2 publications

    94 citations

1–8 of 55

Venues

  1. ACM SIGPLAN Notices

    3 publications · 44 citations

    3

    h-index

  2. ACM SIGARCH Computer Architecture News

    2 publications · 33 citations

    2

    h-index

  3. Journal of Chemical Theory and Computation

    JCTC · 1 publications · 25 citations

    1

    h-index

  4. USENIX Annual Technical Conference

    Conference · 1 publications · 67 citations

    1

    h-index

  5. Learning and Individual Differences

    1 publications · 32 citations

    1

    h-index

1–5