Low-latency Data Pipelines

Low-Latency Data Pipelines is a data processing architecture designed to minimize delay in transmitting and transforming data from source to destination, distinguishing itself by enabling near-instantaneous data availability and processing for time-sensitive analytical and operational workloads.

30

Publications

1.2K

Citations

127

Authors

65

Institutions

Publications per year

2017–2026

9

Authors

127

  1. XL
    Xiaoyi Lu

    The Ohio State University, United States

    2 publications · 31 citations

    2

    h-index

  2. GP
    George Porter

    University of California San Diego, United States

    2 publications · 346 citations

    2

    h-index

  3. LK
    Lukáš Kekely

    Brno University of Technology, Czechia

    2 publications · 32 citations

    2

    h-index

  4. VP
    Viktor Puš

    CESNET, zájmové sdružení právnických osob, Czechia

    2 publications · 32 citations

    2

    h-index

  5. JK
    Jan Kořenek

    Brno University of Technology, Czechia

    2 publications · 32 citations

    2

    h-index

1–5 of 127

Venues

  1. 1

    h-index

  2. IEEE Computer Architecture Letters

    1 publications · 17 citations

    1

    h-index

  3. 1

    h-index

  4. 1

    h-index

  5. Parallel Computing

    1 publications · 14 citations

    1

    h-index

1–5