Load Reordering is a memory consistency anomaly in which the execution order of load operations deviates from program order due to processor or memory system optimizations, potentially affecting the visibility and coherence of shared data in multiprocessor systems.
18
Publications
984
Citations
51
Authors
28
Institutions
Publications per year
2017–2026
3
Parents
Publications
18
Soudeh Ghorbani, Zibin Yang, P. Brighten Godfrey et al. · 2017 · 247 citations
Harold W. Cain, Mikko H. Lipasti · ACM SIGARCH Computer Architecture News · 2004 · 79 citations
1–5 of 18
Authors
51
- HW
2
h-index
- MH
2
h-index
- PE
1
h-index
- CR
1
h-index
- MA
1
h-index
1–5 of 51
Institutions
28
University of Wisconsin–Madison
Madison, United States
4 h-index
6 publications
725 citations
The University of Texas at Austin
Austin, United States
2 h-index
6 publications
286 citations
University of York
York, United Kingdom
1 h-index
1 publications
11 citations
Hunan University of Science and Technology
Xiangtan, China
1 h-index
1 publications
47 citations
Université de Rouen Normandie
Rouen, France
1 h-index
2 publications
36 citations
University of Pavia
Pavia, Italy
1 h-index
3 publications
75 citations
University of Nebraska–Lincoln
Lincoln, United States
1 h-index
4 publications
104 citations
Information Technology Laboratory
Gaithersburg, United States
1 h-index
4 publications
44 citations
1–8 of 28
Venues
- ACM SIGARCH Computer Architecture News
2 publications · 95 citations
2
h-index
- IEEE Transactions on Computers
2 publications · 315 citations
2
h-index
- INFORMS Journal on Applied Analytics
1 publications · 11 citations
1
h-index
- SIAM Journal on Scientific and Statistical Computing
1 publications · 11 citations
1
h-index
- Proceedings, IEEE International Conference on Computer Design/Proceedings - IEEE International Conference on Computer Design
Conference · 1 publications · 11 citations
1
h-index
1–5