Layout Obfuscation
Layout Obfuscation is a hardware obfuscation technique that conceals the functional structure of an integrated circuit by altering its physical layout to prevent reverse engineering while preserving its logical behavior.
31
Publications
1.8K
Citations
100
Authors
37
Institutions
Publications per year
2017–2026
17
Parents
31
Security analysis of integrated circuit camouflaging
Jeyavijayan Rajendran, Michael Sam, Ozgur Sinanoglu et al. · 2013 · 379 citations
Cyclic Obfuscation for Creating SAT-Unresolvable Circuits
Kaveh Shamsi, Meng Li, Travis Meade et al. · 2017 · 159 citations · Full text
Statistical Deobfuscation of Android Applications
Benjamin Bichsel, Veselin Raychev, Petar Tsankov et al. · 2016 · 116 citations · Full text
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37
University of Florida
Gainesville, United States
3 h-index
6 publications
130 citations

University of Massachusetts Amherst
Amherst Center, United States
3 h-index
12 publications
901 citations
New York University Abu Dhabi
Abu Dhabi, United Arab Emirates
3 h-index
7 publications
515 citations
University of Maryland, College Park
College Park, United States
3 h-index
10 publications
281 citations
New York University
New York, United States
3 h-index
5 publications
1.2K citations
Technical University of Munich
Munich, Germany
2 h-index
2 publications
47 citations
The University of Texas at Austin
Austin, United States
2 h-index
5 publications
583 citations
University of Connecticut
Storrs, United States
2 h-index
6 publications
327 citations
1–8 of 37
3 publications · 138 citations
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Conference · 1 publications · 162 citations
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1 publications · 14 citations
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1 publications · 110 citations
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1 publications · 30 citations
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