Latency Hiding Techniques
Latency Hiding Techniques is a computational optimization strategy in parallel computing that belongs to the class of performance-enhancement methods by overlapping computation or communication operations to mask the effects of memory or synchronization delays rather than reducing them.
90
Publications
4.7K
Citations
272
Authors
92
Institutions
Publications per year
2017–2026
13
90
1–5 of 90
272
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IBM Research - Thomas J. Watson Research Center, United States
3 publications · 101 citations
3
h-index
1–5 of 272
92
The Ohio State University
Columbus, United States
6 h-index
15 publications
335 citations
Intel (United States)
Santa Clara, United States
6 h-index
12 publications
395 citations
University of Illinois Urbana-Champaign
Urbana, United States
4 h-index
8 publications
530 citations
Stanford University
Stanford, United States
4 h-index
11 publications
861 citations

University of Toronto
Toronto, Canada
3 h-index
4 publications
173 citations
Purdue University West Lafayette
West Lafayette, United States
3 h-index
12 publications
404 citations

Illinois Institute of Technology
Chicago, United States
3 h-index
7 publications
278 citations
University of Michigan
Ann Arbor, United States
3 h-index
13 publications
230 citations
1–8 of 92
2 publications · 66 citations
2
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TECS · 2 publications · 28 citations
2
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Repository · 2 publications · 160 citations
2
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1 publications · 25 citations
1
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1 publications · 13 citations
1
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1–5