Last-level Cache Behavior

Last-Level Cache Behavior is a performance characterization framework that specifically analyzes the access patterns, miss rates, and latency effects of the highest-level, shared cache in a hierarchical memory system, distinguishing it from lower-level cache analyses by focusing on system-wide memory behavior and its impact on overall application execution.

182

Publications

10.3K

Citations

531

Authors

181

Institutions

Publications per year

2017–2026

60

Variants

Llc Behavior

Authors

531

  1. AJ
    Aamer Jaleel

    Intel (United States), United States

    8 publications · 1.5K citations

    8

    h-index

  2. MC
    Mainak Chaudhuri

    Indian Institute of Technology Kanpur, India

    5 publications · 229 citations

    5

    h-index

  3. DA
    Daniel A. Jiménez

    Texas A&M University, United States

    5 publications · 432 citations

    5

    h-index

  4. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    5 publications · 156 citations

    5

    h-index

  5. LZ
    Li Zhao

    Intel (United States), United States

    4 publications · 209 citations

    4

    h-index

1–5 of 531

Venues

  1. IEEE Transactions on Computers

    7 publications · 173 citations

    7

    h-index

  2. ACM SIGARCH Computer Architecture News

    5 publications · 572 citations

    5

    h-index

  3. ACM Transactions on Architecture and Code Optimization

    TACO · 6 publications · 161 citations

    5

    h-index

  4. arXiv (Cornell University)

    Repository · 4 publications · 117 citations

    4

    h-index

  5. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 4 publications · 101 citations

    4

    h-index

1–5