Interrupt Mitigation
Interrupt Mitigation is a hardware-software co-design technique in direct memory access systems that reduces the frequency and overhead of processor interrupts by batching or delaying interrupt generation, thereby improving system performance and resource utilization.
19
Publications
1.6K
Citations
63
Authors
24
Institutions
Publications per year
2017–2026
2
Parents
19
Brent Chun, David Culler, Timothy Roscoe et al. · ACM SIGCOMM Computer Communication Review · 2003 · 1K citations
Random testing of interrupt-driven software
John Regehr · 2005 · 95 citations
Hany E. Ramadan, Christopher J. Rossbach, Donald E. Porter et al. · 2007 · 78 citations
Steve Kleiman, Joe Eykholt · ACM SIGOPS Operating Systems Review · 1995 · 61 citations · Full text
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The University of Texas at Austin, United States
2 publications · 89 citations
2
h-index
1–5 of 63
24
University of Utah
Salt Lake City, United States
3 h-index
5 publications
213 citations
Intel (United States)
Santa Clara, United States
2 h-index
4 publications
3.1K citations
Princeton University
Princeton, United States
2 h-index
4 publications
3.1K citations
The University of Texas at Austin
Austin, United States
2 h-index
12 publications
534 citations
Meta (United States)
Menlo Park, United States
2 h-index
2 publications
34 citations
Hainan University
Haikou, China
1 h-index
5 publications
60 citations
CEA Grenoble
Grenoble, France
1 h-index
5 publications
315 citations
Board of the Swiss Federal Institutes of Technology
Zurich, Switzerland
1 h-index
1 publications
40 citations
1–8 of 24
2 publications · 75 citations
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2 publications · 61 citations
2
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1 publications · 11 citations
1
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TPDS · 1 publications · 13 citations
1
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1 publications · 12 citations
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