Interrupt Mitigation

Interrupt Mitigation is a hardware-software co-design technique in direct memory access systems that reduces the frequency and overhead of processor interrupts by batching or delaying interrupt generation, thereby improving system performance and resource utilization.

19

Publications

1.6K

Citations

63

Authors

24

Institutions

Publications per year

2017–2026

2

Authors

63

  1. JR
    John Regehr

    University of Utah, United States

    3 publications · 154 citations

    3

    h-index

  2. AB
    Aditya Bhandari

    The University of Texas at Austin, United States

    2 publications · 89 citations

    2

    h-index

  3. UD
    Usit Duongsaa

    University of Utah, United States

    2 publications · 59 citations

    2

    h-index

  4. HE
    Hany E. Ramadan

    The University of Texas at Austin, United States

    2 publications · 89 citations

    2

    h-index

  5. CJ
    Christopher J. Rossbach

    The University of Texas at Austin, United States

    2 publications · 89 citations

    2

    h-index

1–5 of 63

Venues

  1. ACM SIGOPS Operating Systems Review

    2 publications · 75 citations

    2

    h-index

  2. Communications of the ACM

    2 publications · 61 citations

    2

    h-index

  3. ACM SIGARCH Computer Architecture News

    1 publications · 11 citations

    1

    h-index

  4. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 1 publications · 13 citations

    1

    h-index

  5. Cluster Computing

    1 publications · 12 citations

    1

    h-index

1–5