Interrupt Handling Verification is a formal method used in computer systems research to systematically validate the correctness, timing, and reliability of interrupt handling mechanisms in embedded and real-time operating systems.
5
Publications
169
Citations
16
Authors
11
Institutions
Publications per year
2017–2026
1
Parents
Publications
5
Certifying low-level programs with hardware interrupts and preemptive threads
Xinyu Feng, Zhong Shao, Yuan Dong et al. · 2008 · 79 citations
1–5 of 5
Authors
16
- XF
2
h-index
- ZS
2
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- YG
2
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- TM
1
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- DB
1
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1–5 of 16
Institutions
11
Toyota Technological Institute at Chicago
Chicago, United States
2 h-index
2 publications
123 citations
University of Science and Technology of China
Hefei, China
2 h-index
2 publications
123 citations
Yale University
New Haven, United States
2 h-index
2 publications
123 citations
Tsinghua University
Beijing, China
2 h-index
2 publications
123 citations
University of California, Los Angeles
Los Angeles, United States
1 h-index
1 publications
23 citations
Brandenburg University of Technology Cottbus-Senftenberg
Senftenberg, Germany
1 h-index
2 publications
22 citations
Fraunhofer Institute for Integrated Circuits
Erlangen, Germany
1 h-index
1 publications
11 citations
University of Sussex
Brighton, United Kingdom
1 h-index
1 publications
12 citations
1–8 of 11
Venues
- IEEE Transactions on Software Engineering
TSE · 1 publications · 23 citations
1
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- ACM Transactions on Embedded Computing Systems
TECS · 1 publications · 12 citations
1
h-index
- Journal of Automated Reasoning
1 publications · 44 citations
1
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1–3