Concepedia

Interrupt Affinity

Interrupt Affinity is a processor-level scheduling mechanism that binds specific hardware interrupts to designated CPU cores, thereby optimizing cache locality and system performance by ensuring consistent handling of interrupts on preferred processing units.

4

Publications

124

Citations

15

Authors

6

Institutions

Publications per year

2017–2026

0

Parents

Publications

4

1–4 of 4

Authors

15

  1. DN
    Don Newell

    Intel (United States), United States

    2 publications · 96 citations

    2

    h-index

  2. JM
    Jason M. Fung

    Intel (United States), United States

    2 publications · 96 citations

    2

    h-index

  3. AF
    Annie Foong

    Intel (United States), United States

    2 publications · 96 citations

    2

    h-index

  4. XD
    Xi Duan

    Illinois Institute of Technology, United States

    1 publications · 16 citations

    1

    h-index

  5. JL
    Jason Leigh

    University of Illinois Chicago, United States

    1 publications · 12 citations

    1

    h-index

1–5 of 15

Institutions

6

  1. Intel (United States)

    Santa Clara, United States

    2 h-index

    9 publications

    390 citations

  2. University of Illinois Urbana-Champaign

    Urbana, United States

    1 h-index

    2 publications

    24 citations

  3. NTT (Japan)

    Tokyo, Japan

    1 h-index

    3 publications

    36 citations

  4. Illinois Institute of Technology

    Chicago, United States

    1 h-index

    4 publications

    64 citations

  5. University of Chicago

    Chicago, United States

    1 h-index

    1 publications

    12 citations

  6. University of Illinois Chicago

    Chicago, United States

    1 h-index

    2 publications

    24 citations

1–6 of 6