Instruction Timing Analysis
Instruction Timing Analysis is a side-channel attack technique that exploits variations in the execution time of processor instructions to infer secret information by correlating timing differences with data-dependent computational behavior.
48
Publications
1.8K
Citations
129
Authors
50
Institutions
Publications per year
2017–2026
13
Parents
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Timing Analysis for Instruction Caches
Frank Mueller · Real-Time Systems · 2000 · 179 citations
On Subnormal Floating Point and Abnormal Timing
Marc Andrysco, David Kohlbrenner, Keaton Mowery et al. · 2015 · 166 citations · Full text
Jo Van Bulck, Frank Piessens, Raoul Strackx · 2018 · 100 citations · Full text
Eliminating timing side-channel leaks using program repair
Meng Wu, Shengjian Guo, Patrick Schaumont et al. · 2018 · 99 citations
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University of California San Diego
San Diego, United States
4 h-index
13 publications
1.1K citations
Yale University
New Haven, United States
2 h-index
6 publications
150 citations
Seoul National University
Seoul, South Korea
2 h-index
6 publications
198 citations
Northwestern University
Evanston, United States
2 h-index
6 publications
90 citations
KU Leuven
Leuven, Belgium
2 h-index
6 publications
426 citations
Chalmers University of Technology
Gothenburg, Sweden
2 h-index
4 publications
810 citations

University of Tübingen
Tübingen, Germany
2 h-index
2 publications
65 citations
FZI Research Center for Information Technology
Karlsruhe, Germany
2 h-index
2 publications
65 citations
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ENTCS · 2 publications · 85 citations
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2 publications · 34 citations
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Repository · 2 publications · 61 citations
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2 publications · 24 citations
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JCSE · 1 publications · 12 citations
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