Instruction Selection For Graphics Processing Units

Instruction Selection for Graphics Processing Units is a computational optimization technique within compiler design that specifically targets the efficient mapping of high-level operations to the highly parallel and deeply pipelined instruction sets of graphics processing units, distinguishing it from instruction selection methods tailored to central processing units or other architectures.

6

Publications

114

Citations

12

Authors

7

Institutions

Publications per year

2017–2026

1

Authors

12

  1. CL
    Carol L. Hammond

    Sheffield Hallam University, United Kingdom

    1 publications · 21 citations

    1

    h-index

  2. DS
    Deborah S. Coutant

    Hewlett-Packard (United States), United States

    1 publications · 21 citations

    1

    h-index

  3. RR
    Richard Reed

    Deakin University, Australia

    1 publications · 31 citations

    1

    h-index

  4. SO
    S.A. Ould Kablia

    Université Paris-Sud, France

    1 publications · 13 citations

    1

    h-index

  5. JP
    John Paul Shen

    Carnegie Mellon University, United States

    1 publications · 10 citations

    1

    h-index

1–5 of 12

Venues

  1. The Journal of Supercomputing

    1 publications · 10 citations

    1

    h-index

  2. Advances in Engineering Software (1978)

    1 publications · 31 citations

    1

    h-index

  3. Journal of Parallel and Distributed Computing

    1 publications · 21 citations

    1

    h-index

  4. COMPCON

    1 publications · 21 citations

    1

    h-index

1–4