Concepedia

Input Block Architecture

Input Block Architecture is a functional component within Field-Programmable Gate Array Architecture that governs the interface and signal conditioning mechanisms for external inputs, distinguished by its role in configuring and managing the electrical, timing, and protocol-level characteristics of input data paths.

8

Publications

145

Citations

18

Authors

8

Institutions

Publications per year

2017–2026

0

Parents

Publications

8

FPGA implementation of pipelined 2D-DCT and quantization architecture for JPEG image compression

Enas Dhuhri Kusuma, Thomas Sri Widodo · 2010 · 31 citations

, , +17

Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy

Wenyi Feng, Sinan Kaptanoglu · ACM Transactions on Reconfigurable Technology and Systems · 2008 · 22 citations

, , +17

A flexible module library for custom DSP applications in a multiprocessor environment

E. Blokken, H. De Keulenaer, Francky Catthoor et al. · IEEE Journal of Solid-State Circuits · 1990 · 21 citations

, , +16

Hardware implementation of evolvable block-based neural networks utilizing a cost efficient sigmoid-like activation function

Vishnu P. Nambiar, Mohamed Khalil-Hani, Riadh Sahnoun et al. · Neurocomputing · 2014 · 20 citations

, , +16

Designing efficient input interconnect blocks for LUT clusters using counting and entropy

Wenyi Feng, Sinan Kaptanoglu · 2007 · 16 citations

, , +17

1–5 of 8

Authors

18

  1. SK
    Sinan Kaptanoglu

    Bio-Technical Resources (United States), United States

    2 publications · 38 citations

    2

    h-index

  2. WF
    Wenyi Feng

    Microsemi (United States), United States

    2 publications · 38 citations

    2

    h-index

  3. HD
    H.J. De Man

    KU Leuven, Belgium

    1 publications · 21 citations

    1

    h-index

  4. MN
    Muhammad Nadzir Marsono

    University of Technology Malaysia, Malaysia

    1 publications · 20 citations

    1

    h-index

  5. SK
    Sohag Kabir

    University of Bradford, United Kingdom

    1 publications · 12 citations

    1

    h-index

1–5 of 18

Institutions

8

  1. Intel (United States)

    Santa Clara, United States

    2 h-index

    3 publications

    64 citations

  2. KU Leuven

    Leuven, Belgium

    1 h-index

    1 publications

    21 citations

  3. IMEC

    Leuven, Belgium

    1 h-index

    4 publications

    84 citations

  4. University of Hull

    Hull, United Kingdom

    1 h-index

    1 publications

    12 citations

  5. University of Technology Malaysia

    Johor Bahru, Malaysia

    1 h-index

    3 publications

    60 citations

  6. Ministry of Home Affairs

    Dhaka, Bangladesh

    1 h-index

    1 publications

    12 citations

  7. University of Saskatchewan

    Saskatoon, Canada

    1 h-index

    2 publications

    20 citations

  8. Universitas Gadjah Mada

    Yogyakarta, Indonesia

    1 h-index

    2 publications

    62 citations

1–8 of 8

Venues

  1. 1

    h-index

  2. Neurocomputing

    1 publications · 20 citations

    1

    h-index

  3. IEEE Journal of Solid-State Circuits

    1 publications · 21 citations

    1

    h-index

  4. 1

    h-index

  5. 1

    h-index

1–5