High-speed Serial Interface
A High-Speed Serial Interface is a communication protocol that enables the transmission of data at elevated rates over a single or differential signaling line, distinguishing itself from parallel or lower-speed serial interfaces by its use of serialized bit streams, clock recovery mechanisms, and signaling techniques optimized for bandwidth efficiency and reduced electromagnetic interference in high-frequency operation.
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2.2K
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355
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127
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2017–2026
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6.4Gb/s multi-threaded BCH encoder and decoder for multi-channel SSD controllers
Youngjoo Lee, Hoyoung Yoo, Injae Yoo et al. · 2012 · 72 citations
Enrico Monaco, Gabriele Anzalone, Guido Albasini et al. · IEEE Journal of Solid-State Circuits · 2017 · 53 citations
Engineering, Computer Engineering, Electrical Engineering +17
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Stanford University
Stanford, United States
3 h-index
7 publications
176 citations
Istituto Nazionale di Fisica Nucleare, Sezione di Napoli
Naples, Italy
2 h-index
3 publications
76 citations

University of L'Aquila
L’Aquila, Italy
2 h-index
6 publications
122 citations
University of Patras
Pátrai, Greece
2 h-index
7 publications
121 citations

Johns Hopkins University
Baltimore, United States
2 h-index
5 publications
76 citations
University of Udine
Udine, Italy
2 h-index
4 publications
86 citations
Altera (United States)
San Jose, United States
2 h-index
6 publications
112 citations
Intel (United Kingdom)
Swindon, United Kingdom
2 h-index
5 publications
142 citations
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7 publications · 133 citations
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JINST · 3 publications · 65 citations
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3 publications · 79 citations
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2 publications · 84 citations
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2 publications · 35 citations
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