Hardware-assisted Nested Virtualization

Hardware-Assisted Nested Virtualization is a virtualization architecture that enables the execution of virtual machines within virtualized environments by leveraging dedicated processor extensions and hardware features to offload and accelerate the management of nested page tables and virtualized instruction sets, thereby distinguishing itself from software-only approaches through direct hardware support for nested virtualization primitives.

4

Publications

121

Citations

14

Authors

4

Institutions

Publications per year

2017–2026

2

Authors

14

  1. JT
    Jin T. E. Lim

    Columbia University, United States

    2 publications · 58 citations

    2

    h-index

  2. JN
    Jason Nieh

    Columbia University, United States

    2 publications · 58 citations

    2

    h-index

  3. OA
    Ole Agesen

    Kitware (United States), United States

    1 publications · 46 citations

    1

    h-index

  4. YD
    Yaozu Dong

    Shanghai Jiao Tong University, China

    1 publications · 17 citations

    1

    h-index

  5. JS
    Jeffrey Sheldon

    Kitware (United States), United States

    1 publications · 46 citations

    1

    h-index

1–5 of 14

Institutions

4

  1. Columbia University

    New York, United States

    2 h-index

    6 publications

    166 citations

  2. Intel (Taiwan)

    Taipei, Taiwan

    1 h-index

    2 publications

    34 citations

  3. Kitware (United States)

    New York, United States

    1 h-index

    4 publications

    184 citations

  4. Tsinghua University

    Beijing, China

    1 h-index

    3 publications

    51 citations

1–4 of 4

Venues

  1. ACM SIGOPS Operating Systems Review

    1 publications · 46 citations

    1

    h-index

1–1