Hardware Register Abstraction

Hardware Register Abstraction is a programming interface that represents physical hardware registers as memory-mapped locations, enabling unified access to device control and status functions through standard memory operations rather than dedicated I/O instructions.

Publications

262

Citations

Authors

Institutions

Publications per year

2017–2026

Parents

Memory-mapped I/o

Publications

Atomic shared register access by asynchronous hardware

Paul Vitányi, Baruch Awerbuch · 1986 · 175 citations

Computing, Computer Engineering, Computer Science +9

Hardware Objects for Java

Martin Schoeberl, Christian Thalinger, Stephan Korsholm et al. · 2008 · 32 citations

Engineering, Computer Engineering, Computer Science +14

A computer for direct execution of algorithmic languages

James P. Anderson · 1961 · 29 citations

Computing, Computer Science, Computer Systems +8

A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures Using PAPI

Leonardo Suriano, Daniel Madroñal, Alfonso Rodríguez et al. · 2018 · 14 citations · Full text

Engineering, Computer Engineering, High-performance Computing +16

One-write algorithms for multivalued regular and atomic registers

S.K. Chaudhuri, Martha J. Kosa, Jennifer L. Welch · Acta Informatica · 2000 · 12 citations

Engineering, Computer Engineering, Computer Science +11

1–5 of 5

Authors

SK
Stephan Korsholm
Aalborg University, Denmark
1 publications · 32 citations
1
h-index
JL
Jennifer L. Welch
Texas A&M University, United States
1 publications · 12 citations
1
h-index
SC
S.K. Chaudhuri
University of Waterloo, Canada
1 publications · 12 citations
1
h-index
EJ
Eduardo Juárez
Universidad Politécnica de Madrid, Spain
1 publications · 14 citations
1
h-index
CS
C. Sanz
Universidad Politécnica de Madrid, Spain
1 publications · 14 citations
1
h-index

1–5 of 16

Institutions

1–8 of 11

Venues

Acta Informatica
1 publications · 12 citations
1
h-index

1–1