Concepedia

Gpu Scatter Operations

GPU Scatter Operations is a computational method in parallel computing that enables the efficient distribution of data elements from a global memory space to designated locations in a GPU's memory hierarchy during scatter operations, distinguished by its optimization for the massively parallel architecture of graphics processing units.

8

Publications

422

Citations

30

Authors

14

Institutions

Publications per year

2017–2026

1

Parents

Publications

8

Efficient gather and scatter operations on graphics processors

Bingsheng He, Naga K. Govindaraju, Qiong Luo et al. · 2007 · 128 citations

, , +17

On dynamic load balancing on graphics processors

Daniel Cederman, Philippas Tsigas · 2008 · 91 citations

, , +17

GraphReduce

Dipanjan Sengupta, Shuaiwen Leon Song, Kapil Agarwal et al. · 2015 · 88 citations

, , +17

GPU accelerated image aligned splatting

Neophytos Neophytou, Klaus Mueller · 2005 · 34 citations

, , +17

On sorting and load balancing on GPUs

Daniel Cederman, Philippas Tsigas · ACM SIGARCH Computer Architecture News · 2008 · 28 citations

, , +17

1–5 of 8

Authors

30

  1. DC
    Daniel Cederman

    Chalmers University of Technology, Sweden

    2 publications · 119 citations

    2

    h-index

  2. PT
    Philippas Tsigas

    Chalmers University of Technology, Sweden

    2 publications · 119 citations

    2

    h-index

  3. NN
    Neophytos Neophytou

    University of Warwick, United Kingdom

    2 publications · 50 citations

    2

    h-index

  4. QL
    Qiong Luo

    Hong Kong University of Science and Technology, Hong Kong SAR China

    1 publications · 128 citations

    1

    h-index

  5. TR
    Tomasz Rozen

    1 publications · 20 citations

    1

    h-index

1–5 of 30

Institutions

14

  1. Chalmers University of Technology

    Gothenburg, Sweden

    2 h-index

    4 publications

    238 citations

  2. University of California, Riverside

    Riverside, United States

    1 h-index

    4 publications

    68 citations

  3. Pacific Northwest National Laboratory

    Richland, United States

    1 h-index

    1 publications

    88 citations

  4. Georgia Institute of Technology

    Atlanta, United States

    1 h-index

    3 publications

    264 citations

  5. Stevens Institute of Technology

    Hoboken, United States

    1 h-index

    1 publications

    17 citations

  6. Microsoft (United States)

    Redmond, United States

    1 h-index

    2 publications

    256 citations

  7. Microsoft (Finland)

    Espoo, Finland

    1 h-index

    2 publications

    256 citations

  8. Hong Kong University of Science and Technology

    Hong Kong, Hong Kong

    1 h-index

    2 publications

    256 citations

1–8 of 14

Venues

  1. Volume graphics ...

    1 publications · 16 citations

    1

    h-index

  2. ACM SIGARCH Computer Architecture News

    1 publications · 28 citations

    1

    h-index

  3. Digital Library (University of West Bohemia)

    Repository · 1 publications · 20 citations

    1

    h-index

1–3