Ftl Mapping Schemes
FTL Mapping Schemes is a systematic approach within solid-state storage systems that defines how logical block addresses from a host are translated into physical page addresses on flash memory, distinguishing itself by determining the granularity, flexibility, and efficiency of address mapping to manage wear leveling, garbage collection, and write amplification.
23
Publications
909
Citations
78
Authors
35
Institutions
Publications per year
2017–2026
4
Parents
23
A superblock-based flash translation layer for NAND flash memory
Jeong‐Uk Kang, Heeseung Jo, Jin‐Soo Kim et al. · 2006 · 312 citations
Dawoon Jung, Jeong‐Uk Kang, Heeseung Jo et al. · ACM Transactions on Embedded Computing Systems · 2010 · 77 citations
Dongchul Park, Biplob Debnath, David Hung-Chang Du · 2010 · 53 citations
WAFTL: A workload adaptive flash translation layer with data partition
Qingsong Wei, Bozhao Gong, Suraj Pathak et al. · 2011 · 40 citations
1–5 of 23
78
3
h-index
3
h-index
2
h-index
2
h-index
Korea Advanced Institute of Science and Technology, South Korea
2 publications · 389 citations
2
h-index
1–5 of 78
35
Seoul National University
Seoul, South Korea
3 h-index
5 publications
108 citations
Samsung (South Korea)
Seoul, South Korea
3 h-index
8 publications
331 citations

University of Minnesota
Minneapolis, United States
3 h-index
8 publications
242 citations
National University of Singapore
Singapore, Singapore
2 h-index
6 publications
198 citations
University of Seoul
Seoul, South Korea
2 h-index
3 publications
78 citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
2 h-index
6 publications
1.4K citations
Huaqiao University
Xiamen, China
2 h-index
3 publications
75 citations

Ajou University
Suwon, South Korea
2 h-index
7 publications
183 citations
1–8 of 35
5 publications · 120 citations
5
h-index
RSP · 1 publications · 34 citations
1
h-index
1 publications · 25 citations
1
h-index
1 publications · 13 citations
1
h-index
PER · 1 publications · 17 citations
1
h-index
1–5