Fpga Offloading

FPGA Offloading is a hardware-accelerated computation offloading technique that leverages field-programmable gate arrays to dynamically reconfigure and execute customized data processing pipelines, thereby reducing latency and improving throughput in kernel-level operations.

25

Publications

851

Citations

88

Authors

36

Institutions

Publications per year

2017–2026

18

Variants

Fpga-based Offloading

Authors

88

  1. YY
    Yoji Yamato

    NTT (Japan), Japan

    5 publications · 112 citations

    5

    h-index

  2. GA
    Gustavo Alonso

    ETH Zurich, Switzerland

    2 publications · 100 citations

    2

    h-index

  3. NF
    Norihisa Fujita

    University of Tsukuba, Japan

    2 publications · 66 citations

    2

    h-index

  4. RK
    Ryohei Kobayashi

    University of Tsukuba, Japan

    2 publications · 66 citations

    2

    h-index

  5. YY
    Yoshiki Yamaguchi

    University of Tsukuba, Japan

    2 publications · 66 citations

    2

    h-index

1–5 of 88

Venues

  1. Proceedings of the VLDB Endowment

    PVLDB · 1 publications · 22 citations

    1

    h-index

  2. Sustainable Computing Informatics and Systems

    1 publications · 20 citations

    1

    h-index

  3. 1

    h-index

  4. 1

    h-index

  5. IEEE Micro

    1 publications · 29 citations

    1

    h-index

1–5