FPGA Accelerator Generation is a systematic methodology within high-level synthesis that automates the translation of high-level algorithmic specifications into optimized, hardware-accelerated implementations specifically targeting field-programmable gate arrays through architectural synthesis, resource allocation, and scheduling transformations.
165
Publications
7.4K
Citations
534
Authors
170
Institutions
Publications per year
2017–2026
87
Parents
Publications
165
From high-level deep neural models to FPGAs
Hardik Sharma, Jongse Park, Divya Mahajan et al. · 2016 · 365 citations
Xiaofan Zhang, Junsong Wang, Chao Zhu et al. · 2018 · 341 citations
1–5 of 165
Authors
534
- JC
12
h-index
- DC
9
h-index
- WL
9
h-index
- XZ
8
h-index
- VK
7
h-index
1–5 of 534
Institutions
170
University of California, Los Angeles
Los Angeles, United States
11 h-index
37 publications
2.2K citations
Imperial College London
London, United Kingdom
11 h-index
31 publications
741 citations
University of Illinois Urbana-Champaign
Urbana, United States
10 h-index
29 publications
2.8K citations
Chinese Academy of Sciences
Beijing, China
8 h-index
21 publications
1.5K citations
University of Southern California
Los Angeles, United States
8 h-index
23 publications
927 citations
Tsinghua University
Beijing, China
5 h-index
15 publications
435 citations
Peking University
Beijing, China
5 h-index
14 publications
2.1K citations
Georgia Institute of Technology
Atlanta, United States
5 h-index
17 publications
3.7K citations
1–8 of 170
Venues
- arXiv (Cornell University)
Repository · 6 publications · 140 citations
6
h-index
- ACM Transactions on Reconfigurable Technology and Systems
5 publications · 198 citations
5
h-index
- Microprocessors and Microsystems
MICPRO · 4 publications · 83 citations
4
h-index
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
3 publications · 178 citations
3
h-index
- IEICE Transactions on Information and Systems
3 publications · 92 citations
3
h-index
1–5