Fine-grained Clock Gating

Fine-Grained Clock Gating is a clock gating technique that operates at the level of individual functional units or subcomponents within a circuit, selectively disabling clock signals to specific registers or logic blocks based on local activity conditions to achieve precise dynamic power reduction.

Publications

1.7K

Citations

Authors

Institutions

Publications per year

2017–2026

Parents

Clock Gating

Publications

An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS

Sriram Vangal, Jason Howard, Gregory Ruhl et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 634 citations

Engineering, Computer Engineering, Electrical Engineering +15

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS

Sriram Vangal, Jason Howard, Greg Ruhl et al. · IEEE Journal of Solid-State Circuits · 2008 · 627 citations

Engineering, Computer Engineering, Computer Science +17

The microarchitecture of the synergistic processor for a cell processor

B. Flachs, S. Asano, S.H. Dhong et al. · IEEE Journal of Solid-State Circuits · 2005 · 104 citations

Engineering, Computer Engineering, Computer Science +17

5.6 A 0.13&#x03BC;m fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic range

Saad Bin Nasir, Samantak Gangopadhyay, Arijit Raychowdhury · 2015 · 91 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Fully Pipelined Single-Precision Floating-Point Unit in the Synergistic Processor Element of a CELL Processor

Hwa-Joon Oh, Silvia Melitta Mueller, Christian Jacobi et al. · IEEE Journal of Solid-State Circuits · 2006 · 62 citations

Engineering, Computer Engineering, Computer Science +17

1–5 of 14

Authors

TH
Toshihiro Hattori
Renesas Electronics (Japan), Japan
2 publications · 67 citations
2
h-index
SV
Sriram Vangal
Intel (United States), United States
2 publications · 1.3K citations
2
h-index
SM
Silvia Melitta Mueller
IBM (Germany), Germany
2 publications · 166 citations
2
h-index
SD
S.H. Dhong
IBM (United States), United States
2 publications · 166 citations
2
h-index
NY
N. Yano
Toshiba (Japan), Japan
2 publications · 166 citations
2
h-index

1–5 of 96

Institutions

1–8 of 22

Venues

IEEE Journal of Solid-State Circuits
3 publications · 793 citations
3
h-index
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
1 publications · 634 citations
1
h-index
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
1 publications · 20 citations
1
h-index
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
1 publications · 12 citations
1
h-index
Frontiers in Neuroscience
1 publications · 11 citations

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