Failure Logic Modeling
Failure Logic Modeling is a systematic analytical framework within fault tree analysis that formally represents the logical relationships and dependencies among component failures to identify the root causes of system-level failures.
18
Publications
761
Citations
45
Authors
27
Institutions
Publications per year
2017–2026
5
Parents
18
1–5 of 18
45
2
h-index
2
h-index
2
h-index
2
h-index
1
h-index
1–5 of 45
27
Loughborough University
Loughborough, United Kingdom
2 h-index
4 publications
186 citations

University of Strathclyde
Glasgow, United Kingdom
2 h-index
2 publications
110 citations
Beijing Jiaotong University
Beijing, China
1 h-index
4 publications
44 citations

Idaho National Laboratory
Idaho Falls, United States
1 h-index
2 publications
184 citations

Langley Research Center
Hampton, United States
1 h-index
1 publications
50 citations

University of Tehran
Tehran, Iran
1 h-index
2 publications
44 citations

Banaras Hindu University
Varanasi, India
1 h-index
2 publications
42 citations
University of Tennessee at Knoxville
Knoxville, United States
1 h-index
1 publications
92 citations
1–8 of 27
3 publications · 138 citations
3
h-index
2 publications · 98 citations
2
h-index
2 publications · 115 citations
2
h-index
1 publications · 25 citations
1
h-index
1 publications · 59 citations
1
h-index
1–5