Energy-efficient Lut Design

Energy-Efficient LUT Design is a methodology in digital circuit optimization that minimizes power consumption during lookup table operation by strategically reducing switching activity and leakage energy while maintaining functional integrity.

69

Publications

1.9K

Citations

191

Authors

90

Institutions

Publications per year

2017–2026

23

Authors

191

  1. DS
    Daisuke Suzuki

    Tohoku University, Japan

    5 publications · 130 citations

    5

    h-index

  2. TH
    Takahiro Hanyu

    Tohoku University, Japan

    5 publications · 130 citations

    5

    h-index

  3. MN
    Masanori Natsui

    Tohoku University, Japan

    3 publications · 105 citations

    3

    h-index

  4. RZ
    Ramtin Zand

    University of Central Florida, United States

    3 publications · 86 citations

    3

    h-index

  5. RF
    Ronald F. DeMara

    University of Central Florida, United States

    3 publications · 86 citations

    3

    h-index

1–5 of 191

Venues

  1. 4

    h-index

  2. Integration

    3 publications · 44 citations

    3

    h-index

  3. Circuits Systems and Signal Processing

    CSSP · 2 publications · 33 citations

    2

    h-index

  4. 2

    h-index

  5. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 1 publications · 38 citations

    1

    h-index

1–5