Embedded System Verification

Embedded System Verification is a formal process belonging to the class of validation methodologies that specifically ensures an automotive embedded system's design and implementation conform to specified functional and non-functional requirements through rigorous, systematic, and often automated techniques.

299

Publications

9.6K

Citations

806

Authors

317

Institutions

Publications per year

2017–2026

43

Authors

806

  1. LA
    Luis Alejandro Cortés

    Linköping University, Sweden

    7 publications · 304 citations

    7

    h-index

  2. MW
    Muhammad Waseem Anwar

    National University of Sciences and Technology, Pakistan

    7 publications · 212 citations

    7

    h-index

  3. MR
    Muhammad Rashid

    Umm al-Qura University, Saudi Arabia

    7 publications · 212 citations

    7

    h-index

  4. PE
    Petru Eles

    Linköping University, Sweden

    6 publications · 238 citations

    6

    h-index

  5. ZP
    Zebo Peng

    Linköping University, Sweden

    6 publications · 238 citations

    6

    h-index

1–5 of 806

Venues

  1. ACM Transactions on Embedded Computing Systems

    TECS · 6 publications · 120 citations

    6

    h-index

  2. Electronic Notes in Theoretical Computer Science

    ENTCS · 5 publications · 78 citations

    5

    h-index

  3. Computer

    4 publications · 148 citations

    4

    h-index

  4. International Journal of Parallel Programming

    4 publications · 69 citations

    4

    h-index

  5. Proceedings of the IEEE

    4 publications · 1K citations

    4

    h-index

1–5