Dynamic Instruction Scheduling is a method in computer architecture that enables the runtime reordering of instructions to exploit available parallelism by identifying and executing independent operations as soon as their operands and execution units become ready, thereby decoupling instruction execution from the original program order.
93
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4.1K
Citations
214
Authors
73
Institutions
Publications per year
2017–2026
5
Publications
93
Dynamic speculation and synchronization of data dependences
Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar et al. · 1997 · 291 citations · Full text
Rastislav Bodík, Rajiv Gupta, Vivek Sarkar · 2000 · 234 citations · Full text
On pipelining dynamic instruction scheduling logic
Jared Stark, Mary D. Brown, Yale N. Patt · 2000 · 132 citations
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Authors
214
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1–5 of 214
Institutions
73
University of Wisconsin–Madison
Madison, United States
10 h-index
23 publications
1.8K citations
University of Michigan
Ann Arbor, United States
5 h-index
11 publications
738 citations
Intel (United States)
Santa Clara, United States
5 h-index
20 publications
767 citations
University of Illinois Urbana-Champaign
Urbana, United States
4 h-index
8 publications
190 citations
University of Virginia
Charlottesville, United States
4 h-index
8 publications
338 citations
The University of Texas at Austin
Austin, United States
4 h-index
8 publications
532 citations
Stanford University
Stanford, United States
3 h-index
9 publications
570 citations
Delft University of Technology
Delft, The Netherlands
3 h-index
7 publications
309 citations
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Venues
- ACM SIGARCH Computer Architecture News
6 publications · 354 citations
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- IEEE Transactions on Computers
4 publications · 213 citations
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- ACM SIGPLAN Notices
4 publications · 73 citations
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- IEEE Micro
3 publications · 125 citations
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- Performance Evaluation
2 publications · 72 citations
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