Digital Circuit Optimization

Digital Circuit Optimization is a methodological process in digital logic design that systematically enhances the performance, area, power consumption, or reliability of a digital circuit by applying algorithmic and structural transformations while preserving its intended logical functionality.

252

Publications

8.3K

Citations

642

Authors

227

Institutions

Publications per year

2017–2026

Parents

Digital Logic Design

Publications

252

Multiple-Valued Minimization for PLA Optimization

Richard Rudell, Alberto Sangiovanni‐Vincentelli · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1987 · 429 citations

Engineering, Computer Engineering, Computer Science +17

A topological search algorithm for ATPG

Tom Kirkland, M.R. Mercer · 1987 · 269 citations · Full text

Engineering, Computer Engineering, Computer Science +15

SODA

Yuan Lin, Hyunseok Lee, Mark Woh et al. · ACM SIGARCH Computer Architecture News · 2006 · 216 citations

Engineering, Computer Engineering, Computer Science +16

Digital Circuit Optimization via Geometric Programming

Stephen Boyd, Seung-Jean Kim, Dinesh Patil et al. · Operations Research · 2005 · 179 citations

Engineering, Computer Engineering, Electrical Engineering +16

The Automatic Acquisition, Evolution and Reuse of Modules in Cartesian Genetic Programming

James Alfred Walker, Julian F. Miller · IEEE Transactions on Evolutionary Computation · 2008 · 147 citations

Architecture, Computational Engineering, Design Automation +15

1–5 of 252

Authors

642

RK
Robert K. Brayton
University of California, Berkeley, United States
5 publications · 110 citations
5
h-index
MP
Massoud Pedram
University of Southern California, United States
5 publications · 224 citations
5
h-index
VD
Vishwani D. Agrawal
AT&T (United States), United States
4 publications · 100 citations
4
h-index
RD
Rolf Drechsler
University of Bremen, Germany
4 publications · 113 citations
4
h-index
AS
Alberto Sangiovanni‐Vincentelli
University of California, Berkeley, United States
4 publications · 525 citations
4
h-index

1–5 of 642

Institutions

227

1–8 of 227

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
21 publications · 1.3K citations
17
h-index
IEEE Transactions on Computers
11 publications · 624 citations
11
h-index
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
6 publications · 238 citations
6
h-index
Design Automation Conference
Conference · 5 publications · 310 citations
5
h-index
[1992] Proceedings 29th ACM/IEEE Design Automation Conference
Conference · 4 publications · 104 citations
4
h-index

1–5