Deterministic Pushdown Automata

A Deterministic Pushdown Automaton is a pushdown automaton in which, for any given state, input symbol, and top stack symbol, there is at most one permissible transition, ensuring unambiguous, deterministic computation during syntax analysis.

57

Publications

2.4K

Citations

78

Authors

51

Institutions

Publications per year

2017–2026

4

Authors

78

  1. ET
    Etsuji Tomita

    University of Electro-Communications, Japan

    4 publications · 51 citations

    4

    h-index

  2. ZB
    Zuzana Bednárová

    University of Milan, Italy

    2 publications · 37 citations

    2

    h-index

  3. CB
    Catriel Beeri

    Hebrew University of Jerusalem, Israel

    2 publications · 55 citations

    2

    h-index

  4. VG
    Viliam Geffert

    University of Pavol Jozef Šafárik, Slovakia

    2 publications · 37 citations

    2

    h-index

  5. BP
    Beatrice Palano

    University of Milan, Italy

    2 publications · 37 citations

    2

    h-index

1–5 of 78

Venues

  1. Journal of the ACM

    JACM · 7 publications · 517 citations

    7

    h-index

  2. Journal of Computer and System Sciences

    5 publications · 280 citations

    5

    h-index

  3. SIAM Journal on Computing

    4 publications · 139 citations

    4

    h-index

  4. Theoretical Computer Science

    4 publications · 84 citations

    4

    h-index

  5. Information Processing Letters

    3 publications · 48 citations

    3

    h-index

1–5