Dependable Reconfigurable Computing

Dependable Reconfigurable Computing is a computational framework that integrates reconfigurable hardware architectures with fault-tolerant design methodologies to ensure reliable, predictable, and sustained system operation in the presence of dynamic environmental changes, resource constraints, or potential faults.

10

Publications

276

Citations

36

Authors

9

Institutions

Publications per year

2017–2026

1

Authors

36

  1. XI
    Xabier Iturbe

    University of Edinburgh, United Kingdom

    3 publications · 104 citations

    3

    h-index

  2. TA
    Tughrul Arslan

    University of Edinburgh, United Kingdom

    3 publications · 104 citations

    3

    h-index

  3. IM
    Imanol Martínez

    Ikerlan, Spain

    3 publications · 104 citations

    3

    h-index

  4. CH
    Chuan Hong

    University of Edinburgh, United Kingdom

    2 publications · 64 citations

    2

    h-index

  5. KB
    Khaled Benkrid

    University of Edinburgh, United Kingdom

    2 publications · 64 citations

    2

    h-index

1–5 of 36

Venues

  1. 18th International Conference on Nuclear Engineering: Volume 1

    Conference · 1 publications · 10 citations

    1

    h-index

  2. IEEE Transactions on Computers

    1 publications · 48 citations

    1

    h-index

  3. Journal of Applied Logic

    1 publications · 12 citations

    1

    h-index

  4. ERSA

    1 publications · 17 citations

    1

    h-index

  5. IEEE Design and Test

    1 publications · 12 citations

    1

    h-index

1–5