Dependable Reconfigurable Computing
Dependable Reconfigurable Computing is a computational framework that integrates reconfigurable hardware architectures with fault-tolerant design methodologies to ensure reliable, predictable, and sustained system operation in the presence of dynamic environmental changes, resource constraints, or potential faults.
10
Publications
276
Citations
36
Authors
9
Institutions
Publications per year
2017–2026
1
10
Efficient hardware checkpointing
Dirk Koch, Christian Haubelt, Jürgen Teich · 2007 · 86 citations
R3TOS: A reliable reconfigurable real-time operating system
Xabier Iturbe, Ahmet T. Erdogan, Tughrul Arslan et al. · 2010 · 40 citations · Full text
TMR with More Frequent Voting for Improved FPGA Reliability.
Brian Pratt, Michael Caffrey, Derrick S. Gibelyou et al. · ERSA · 2008 · 17 citations
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9

University of Edinburgh
Edinburgh, United Kingdom
3 h-index
13 publications
464 citations
Ikerlan
Mondragón, Spain
2 h-index
7 publications
312 citations

Polytechnique Montréal
Montreal, Canada
1 h-index
1 publications
12 citations
University of Florida
Gainesville, United States
1 h-index
1 publications
21 citations
Association of Electronic and Information Technologies
Donostia / San Sebastian, Spain
1 h-index
3 publications
120 citations
Friedrich-Alexander-Universität Erlangen-Nürnberg
Erlangen, Germany
1 h-index
3 publications
258 citations

Imperial College London
London, United Kingdom
1 h-index
5 publications
60 citations

Czech Technical University in Prague
Prague, Czechia
1 h-index
3 publications
42 citations
1–8 of 9
Conference · 1 publications · 10 citations
1
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1 publications · 48 citations
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1 publications · 12 citations
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1 publications · 17 citations
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1 publications · 12 citations
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