Control Logic Modeling is a formal method for specifying the behavioral rules and decision structures that govern the dynamic coordination and sequencing of actions within an executable system model.
98
Publications
2.8K
Citations
303
Authors
128
Institutions
Publications per year
2017–2026
16
Publications
98
Architecture validation for processors
Richard C. Ho, Congguang Yang, Mark Horowitz et al. · 1995 · 146 citations
Techniques for verifying superscalar microprocessors
Jerry R. Burch · 1996 · 107 citations · Full text
Leveraging SDN layering to systematically troubleshoot networks
Brandon Heller, Colin Scott, Nick McKeown et al. · 2013 · 83 citations
1–5 of 98
Authors
303
- GM
2
h-index
- CY
2
h-index
- MW
2
h-index
- DM
2
h-index
- EA
2
h-index
1–5 of 303
Institutions
128
Stanford University
Stanford, United States
5 h-index
20 publications
1.3K citations
University of California, Berkeley
Berkeley, United States
3 h-index
8 publications
414 citations
University of Michigan
Ann Arbor, United States
3 h-index
5 publications
129 citations
Politecnico di Milano
Milan, Italy
3 h-index
10 publications
247 citations
Fraunhofer Institute for Building Physics
Stuttgart, Germany
2 h-index
3 publications
171 citations
Carnegie Mellon University
Pittsburgh, United States
2 h-index
4 publications
190 citations
OFS (United States)
Norcross, United States
2 h-index
2 publications
29 citations
Cadence Design Systems (United States)
San Jose, United States
2 h-index
2 publications
119 citations
1–8 of 128
Venues
- IEEE Transactions on Industrial Informatics
3 publications · 121 citations
3
h-index
- Proceeding of the 2001 Winter Simulation Conference (Cat. No.01CH37304)
Conference · 2 publications · 32 citations
2
h-index
- SAE technical papers on CD-ROM/SAE technical paper series
2 publications · 33 citations
2
h-index
- International Journal of Computer Integrated Manufacturing
2 publications · 58 citations
2
h-index
- IEEE Transactions on Automation Science and Engineering
2 publications · 66 citations
2
h-index
1–5