Concepedia

Concurrent Trie Structures

Concurrent Trie Structures is a parallel data structure that extends the trie abstraction to support efficient, thread-safe insertions, deletions, and lookups in shared-memory concurrent environments through fine-grained synchronization and structural modifications enabling high levels of parallelism.

9

Publications

440

Citations

15

Authors

8

Institutions

Publications per year

2017–2026

1

Parents

Publications

9

A VLSI architecture for concurrent data structures

William J. Dally · Microprocessors and Microsystems · 1988 · 182 citations · Full text

, , +12

Concurrent tries with efficient non-blocking snapshots

Aleksandar Prokopec, Nathan Bronson, Phil Bagwell et al. · 2012 · 109 citations

, , +14

Non-blocking Patricia Tries with Replace Operations

Niloufar Shafiei · 2013 · 33 citations · Full text

, , +15

Concurrent tries with efficient non-blocking snapshots

Aleksandar Prokopec, Nathan Bronson, Phil Bagwell et al. · ACM SIGPLAN Notices · 2012 · 32 citations · Full text

, , +14

The SkipTrie

Rotem Oshman, Nir Shavit · 2013 · 30 citations · Full text

, , +13

1–5 of 9

Authors

15

  1. PB
    Phil Bagwell

    École Polytechnique Fédérale de Lausanne, Switzerland

    3 publications · 152 citations

    3

    h-index

  2. AP
    Aleksandar Prokopec

    École Polytechnique Fédérale de Lausanne, Switzerland

    3 publications · 152 citations

    3

    h-index

  3. NB
    Nathan Bronson

    Stanford University, United States

    2 publications · 141 citations

    2

    h-index

  4. MO
    Martin Odersky

    École Polytechnique Fédérale de Lausanne, Switzerland

    2 publications · 141 citations

    2

    h-index

  5. WK
    William Kent

    Hewlett-Packard (United States), United States

    1 publications · 16 citations

    1

    h-index

1–5 of 15

Institutions

8

  1. École Polytechnique Fédérale de Lausanne

    Lausanne, Switzerland

    2 h-index

    4 publications

    282 citations

  2. California Institute of Technology

    Pasadena, United States

    1 h-index

    1 publications

    182 citations

  3. Massachusetts Institute of Technology

    Cambridge, United States

    1 h-index

    1 publications

    30 citations

  4. INESC TEC

    Porto, Portugal

    1 h-index

    2 publications

    30 citations

  5. York University

    Toronto, Canada

    1 h-index

    1 publications

    33 citations

  6. Stanford University

    Stanford, United States

    1 h-index

    1 publications

    109 citations

  7. Universidade do Porto

    Porto, Portugal

    1 h-index

    2 publications

    30 citations

  8. University of Toronto

    Toronto, Canada

    1 h-index

    1 publications

    30 citations

1–8 of 8

Venues

  1. 1

    h-index

  2. Microprocessors and Microsystems

    MICPRO · 1 publications · 182 citations

    1

    h-index

  3. International Journal of Parallel Programming

    1 publications · 15 citations

    1

    h-index

  4. ACM SIGPLAN Notices

    1 publications · 32 citations

    1

    h-index

  5. Proceedings of the International Conference on Parallel Processing

    Conference · 1 publications · 12 citations

    1

    h-index

1–5