Concepedia

Compiler Memory Reordering

Compiler Memory Reordering is a compiler optimization technique that alters the order of memory operations in program code to improve performance while preserving program semantics under the constraints of the target architecture’s memory model.

12

Publications

924

Citations

23

Authors

10

Institutions

Publications per year

2017–2026

0

Variants

Compiler Memory Re-ordering

Parents

Publications

12

CoreDet

Tom Bergan, Owen T. Anderson, Joseph Devietti et al. · ACM SIGPLAN Notices · 2010 · 231 citations

, , +17

Vectorization for SIMD architectures with alignment constraints

Alexandre E. Eichenberger, Peng Wu, Kevin O’Brien · 2004 · 200 citations

, , +16

CoreDet

Tom Bergan, Owen T. Anderson, Joseph Devietti et al. · 2010 · 150 citations

, , +17

Dynamic memory disambiguation using the memory conflict buffer

David Gallagher, William Y. Chen, Scott Mahlke et al. · 1994 · 148 citations

, , +17

Vectorization for SIMD architectures with alignment constraints

Alexandre E. Eichenberger, Peng Wu, Kevin O’Brien · ACM SIGPLAN Notices · 2004 · 42 citations

, , +16

1–5 of 12

Authors

23

  1. LC
    Luís Ceze

    University of Washington, United States

    3 publications · 417 citations

    3

    h-index

  2. TB
    Tom Bergan

    University of Oslo, Norway

    3 publications · 417 citations

    3

    h-index

  3. JD
    Joseph Devietti

    University of Washington, United States

    3 publications · 417 citations

    3

    h-index

  4. OT
    Owen T. Anderson

    University of Washington, United States

    3 publications · 417 citations

    3

    h-index

  5. DG
    Dan Grossman

    University of Washington, United States

    3 publications · 417 citations

    3

    h-index

1–5 of 23

Institutions

10

  1. University of Washington

    Seattle, United States

    3 h-index

    15 publications

    2.1K citations

  2. University of Illinois Urbana-Champaign

    Urbana, United States

    3 h-index

    8 publications

    650 citations

  3. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    2 h-index

    6 publications

    726 citations

  4. Institut de Recherche en Informatique et Systèmes Aléatoires

    Rennes, France

    1 h-index

    2 publications

    54 citations

  5. Purdue University West Lafayette

    West Lafayette, United States

    1 h-index

    5 publications

    135 citations

  6. University of Chicago

    Chicago, United States

    1 h-index

    1 publications

    10 citations

  7. Intel (United States)

    Santa Clara, United States

    1 h-index

    1 publications

    148 citations

  8. École Normale Supérieure Paris-Saclay

    Gif-sur-Yvette, France

    1 h-index

    2 publications

    54 citations

1–8 of 10

Venues

  1. ACM SIGPLAN Notices

    2 publications · 273 citations

    2

    h-index

  2. 1

    h-index

  3. ACM SIGARCH Computer Architecture News

    1 publications · 36 citations

    1

    h-index

  4. ACM SIGOPS Operating Systems Review

    1 publications · 16 citations

    1

    h-index

  5. The Economists Voice

    1 publications · 10 citations

    1

    h-index

1–5